Pesudo X86 instructions used for generating constants


I noticed a bunch of psuedo instructions used for creation of constants without generating loads. e.g. pxor xmm0, xmm0
Here is an example of what i am referring to snipped from

def FsFLD0SS : I<0xEF, MRMInitReg, (outs FR32:$dst), (ins), “”,
[(set FR32:$dst, fp32imm0)]>,
Requires<[HasSSE1]>, TB, OpSize;

My question is why was there a need to define such a pseudo instruction?
Wouldn’t it be cleaner to use a def: Pat<> which selects:
pxor $dst, $dst
[(set FR32:$dst, fp32imm0)] ?

Thanks in advance.

Yes, that would be cleaner, except that “xor” and “clear register” have different side effects from the code generator perspective. “Clear register” has no input register operand, but “xor” does. This difference is eliminated after codegen is done and the pseudo instruction is lowered by MCInstLowering.