Looking through TOT sources, I don't see anything that would provide
def/use chains (or equivalent information) post register allocation. I
would like to write some peeps to clean up various target-specific
things but for safety I will need such information.
Is such an analysis pass available somewhere that I've missed? If not,
is there a better way to find all uses of a defined value post register
allocation? Writing a def/use chain pass would not be hard but if the
information is already there I'd rather avoid that cost. 
-Dave
Do the MachineRegisterInfo::def_begin/def_end/use_begin/use_end iterators not work on physical registers?
--Owen
I seem to recall, the last time I used those, that they ended up being a fairly flat list of all definitions and all uses of a physical registers, not all the uses of a particular definition (or vice versa).
Right, the code is no longer in SSA form at this point. If we want to get SSA information at this level, I suspect you want to be querying LiveIntervals, which has that information, assuming it's still live.
--Owen
Owen Anderson <resistor@mac.com> writes:
Owen Anderson <resistor@mac.com> writes:
Right, the code is no longer in SSA form at this point. If we want to
get SSA information at this level, I suspect you want to be querying
LiveIntervals, which has that information, assuming it's still live.
LiveIntervals is better than nothing but it's still more expensive than
querying def/use chains. I don't know where the crossover point is,
where calculating def/use chains would be less expensive than repeated
iterations over MachineInstr register def/use lists and queries of
LiveIntervals.
Still, it should allow me to do the safety analysis. This will run
immediately after RA so hopefully LiveIntervals is still, uh, live.
It should be good enough for now. Thanks!
-Dave