PostRAScheduling for x86

I am trying to understand why PostRAScheduling is done only for ARM. Is there any limitation which prevents this from being done for x86 ?

Thanks,

Karthik

It's a 10% increase in overall compile time, and it does not help very much for x86.

The out-of-order execution on new x86 chips hide any benefits from late scheduling.

/jakob

Jakob Stoklund Olesen <stoklund@2pi.dk> writes:

I am trying to understand why PostRAScheduling is done only for
ARM. Is there any limitation which prevents this from being done for
x86 ?

It's a 10% increase in overall compile time, and it does not help very much for x86.

The out-of-order execution on new x86 chips hide any benefits from late scheduling.

I agree about the compile time issue. For us it is much worse than a
10% hit as HPC codes tend to have very large basic blocks. The compile
time hit made it unusable for us and our users aer accustomed to much
longer compile times than most LLVM users would accept.

I disagree about the performance benefit. Post-RA scheduling certainly
helps in certain spilling cases on x86, which we addressed with the
schedule-spills changes in VirtRegRewriter. I'm not convinced the
current schedule-spills solution is the best in terms of software
engineering as it's a bit of a hack. Having a more general post-RA
scheduling pass which can focus on the things that really matter for a
particular target would be very nice indeed. Getting the focus right
would alleviate the compile time problem as well, I think.

Of course, I have zero time right now to actually do anything about it.
:slight_smile:

                            -Dave