Pre/post-increment addressing mode in LSR

Dear all,

From what I can gather, there is currently no way for loop strength reduction to target pre- and post-increment addressing modes. This is because the target hook isLegalAddressingMode in TargetTransformInfo.h doesn’t allow for pre- and post-increment. There is in fact a comment to that effect on the function prototype: “TODO: handle pre/postinc as well” (see http://llvm.org/docs/doxygen/html/TargetTransformInfo_8h_source.html line 310).

So I was wondering: is there a way to work around this limitation? And are there any plans to add support for pre- and post-increment addressing modes?

Thanks in advance for any help on this.

Jamie Hanlon (from Graphcore, www.graphcore.ai)

It is, unfortunately, a long-standing deficiency. There are some work-arounds in some targets (e.g. lib/Target/PowerPC/PPCLoopPreIncPrep.cpp), but work on this would be appreciated. -Hal

Thanks for the clarification Hal, that’s really useful. We will be sure to upstream any generic work we do on this.

Jamie