Probably FAQ: can you insert BRCONDs during TargetLowering::LowerOperation?

It's yet another CellSPU thing: integer division is a long code sequence we have to insert that has branches within it (test for 0 divisor, etc.) Can't really emit the sequence of instructions via tblgen (can't have labels or BBs). The other alternative is a custom instruction emitter.

Life could be easier if I could insert BRCONDs and other branches from within target-dependent lowering -- if I had access to the current MBB.

Is this possible or just a FAQ?

-scooter

It isn't currently possible for a selection dag to represent more than one machine basic block. I think Christopher Lamb had some code that did some of this, but I don't know how far he got.

The way we currently work around this is with a "custom scheduler insertion hook". For example, see how SELECT_CC_* works on PPC: at isel time we claim that we have the operation, then the scheduler invokes a virtual function to insert it, which expands out into multiple MBBs.

-Chris

Chris:

I was trying to avoid using the custom instruction emitter method. Not as if I didn’t look before I asked the question to see if there was an easier way.

-scooter

Then no, there is no other way.

-Chris

Chris:

It occurred to me this morning that maybe the general solution to this particular type of problem is a custom/target-dependent DAG inserter pass, analogous to target lowering and DAG legalization. I'm not sure if this pass happens before or after legalization. Worth considering?

I suppose the best way to discuss this is to just write the code. However, some preliminary discussion is probably worthwhile to make sure that a target-dependent DAG inserter pass is invoked in the right place in the existing pass stream.

-scooter

Chris:

It occurred to me this morning that maybe the general solution to
this particular type of problem is a custom/target-dependent DAG
inserter pass, analogous to target lowering and DAG legalization. I'm
not sure if this pass happens before or after legalization. Worth
considering?

That doesn't seem much cleaner than the current hack. The correct solution, which we intend to pursue some day, is to do whole function instruction selection.

Evan