problem with non-allocatable register classes

OK, to follow up to my own post, I made a fix in firstCommonClass (copied below for reference). I’m not convinced about the fix, but I am convinced that the code as written is at least partially wrong. The function is looping through the subclass bitvectors of two register classes, looking for the first common subclass. The main loop is looping through the bitvectors word by word. It’s possible that in any given word there is more than one common bit. The code checks the first (rightmost bit). If that class is disqualified by the type check, it loops to the next word rather than checking other bits in the current word.

So my fix has two parts. First: add isAllocatable() to the qualification check. Second: add an inner loop so that if the qualification check fails, we’ll iterate on the other common bits in the current word.

I’m looking for a little confirmation that this seems sensible, since I’m new to LLVM.


static inline

const TargetRegisterClass *firstCommonClass(const uint32_t *A,

const uint32_t *B,

const TargetRegisterInfo *TRI,

const MVT::SimpleValueType SVT =

MVT::SimpleValueType::Any) {

const MVT VT(SVT);

for (unsigned I = 0, E = TRI->getNumRegClasses(); I < E; I += 32)

if (unsigned Common = *A++ & *B++) {

const TargetRegisterClass *RC =

TRI->getRegClass(I + countTrailingZeros(Common));

if (SVT == MVT::SimpleValueType::Any || RC->hasType(VT))

return RC;


return nullptr;