I have hit a extreme case during a bootstrap. The DAG combiner canonicalizes
The problem is that 65536 can de represented inline in a ARM
instruction and 65537 cannot.
I am considering changing the code that creates ARMCMP when lowering
br_cc and set_cc nodes. Does anyone has a better solution?
Three ways to do it. I haven't looked at your model for compares, but:
1. If you lower compares at legalize time, you can handle it then.
2. If you don't lower compares at legalize time (i.e. you have ISD::SETCC legal etc), you can use a target specific dag combine, to turn the RHS of the compare into a TargetConstant instead of ISD::Constant. This will prevent the dag combiner from hacking on the constant.
3. You can handle this as a special case in the selection code, writing a pattern like:
(setlt X, 65537) -> (armsetle X, 65536)
If there are a small number of cases, #3 is preferable, but I imagine that there are a large number of different, but related, cases. If so, handling it with #1 or #2 is preferable.