Is there a way, given an LLVM IR file, to produce assembly and only run the register allocator?
Or, maybe the register allocation is coupled with, I don’t know…
instruction selection. But I guess it’s not coupled with many back-end optimizations,
e.g., back-end LICM, CSE and DCE are not included.
I am writing some middle-end passes and I’d like to check their actual effect on
assembly and run-time, e.g., of the optimized vs unoptimized version. This implies that
I should minimize the effect of back-end optimizations but also keep a minimum code quality.
Right now, I’m producing an .ll file and I’m passing it to llc.
On the one hand, if I run no optimizations in llc (-O0), specifically due to the
absence of regalloc, the code is pretty bad and as far as I can tell, I won’t be able
to ever see the effect of the middle-end optimizations because the bottle-neck will be loading from and storing to stack.
On the other hand, if I run e.g., even -O1, it seems it does optimizations like
LICM, CSE and DCE. Those are some of the optimizations of which I have written my versions
in the middle-end and whose effect I want to check. If llc applies its own version, then I can’t
see any difference between my optimized and the “unoptimized” version.
Running: llc test.ll -regalloc=… doesn’t work because the default optimization level
is -O2 in llc.
I’m not familiar with the back-end and any help would be appreciated. Also, feel free
to give advice on checking the effect of middle-end optimizations in general.