Prolog/Epilog Insertion Question

I've been looking through the code for pologue/epilogoue generation and
noticed this oddity:

void PEI::replaceFrameIndices(MachineFunction &Fn) {
  [...]
    for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) {
        [...]
      if (I->getOpcode() == FrameSetupOpcode ||
          I->getOpcode() == FrameDestroyOpcode) {
        [...]
      } else {
        [...]
        for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
          if (MI->getOperand(i).isFrameIndex()) {
            // If this instruction has a FrameIndex operand, we need to use
            // that
            // target machine register info object to eliminate it.
            MRI.eliminateFrameIndex(MI, SPAdj, RS);

            // Revisit the instruction in full. Some instructions (e.g.
            // inline
            // asm instructions) can have multiple frame indices.
            --I;
            MI = 0;
            break;
          }
      }
      // Update register states.
      if (RS && MI) RS->forward(MI);
    }

The break causes the instruction to be reprocessed but forward() is called
on the register scavenger. Doesn't this create an inconsistency?

                                               -Dave

I've been looking through the code for pologue/epilogoue generation and
noticed this oddity:

void PEI::replaceFrameIndices(MachineFunction &Fn) {
  [...]
    for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) {
        [...]
      if (I->getOpcode() == FrameSetupOpcode ||
          I->getOpcode() == FrameDestroyOpcode) {
        [...]
      } else {
        [...]
        for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
          if (MI->getOperand(i).isFrameIndex()) {
            // If this instruction has a FrameIndex operand, we need to use
            // that
            // target machine register info object to eliminate it.
            MRI.eliminateFrameIndex(MI, SPAdj, RS);

            // Revisit the instruction in full. Some instructions (e.g.
            // inline
            // asm instructions) can have multiple frame indices.
            --I;
            MI = 0;
            break;
          }
      }
      // Update register states.
      if (RS && MI) RS->forward(MI);
    }

The break causes the instruction to be reprocessed but forward() is called
on the register scavenger. Doesn't this create an inconsistency?

It's ok because MI is set to NULL so RS->forward() is skipped.

Evan