PrologEpilogInserter question

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1

Hello,
after some time I'm trying to build my code with the current CVS of LLVM, and
have a problem. The mentioned file, around line 184, contains:

    if (FixedSlot == FixedSpillSlots+NumFixedSpillSlots) {
      // Nope, just spill it anywhere convenient.
      FrameIdx = FFI->CreateStackObject(RegInfo->getSpillSize(Reg)/8,
                                        RegInfo->getSpillAlignment(Reg)/8);
    } else {
      // Spill it to the stack where we must.
      FrameIdx = FFI->CreateFixedObject(RegInfo->getSpillSize(Reg)/8,
                                        FixedSlot->second);
    }

What's the division by 8 for? Neither 'CreateStackObject' nor
'getSpillAlignment' documentation say what units the size is, but everywhere
it's in bytes. In my specific case, 'getSplillAlignment' returns 4, which
becomes 0 after division.

Later on, PEI::calculateFrameObjectOffsets gets this zero alignment and
crashes with division by zero. I don't this zero alignment is reasonable at
all.

And ideas?

Thanks,
Volodya

2

Vladimir Prus wrote:

What's the division by 8 for? Neither 'CreateStackObject' nor
'getSpillAlignment' documentation say what units the size is, but
everywhere it's in bytes. In my specific case, 'getSplillAlignment' returns
4, which becomes 0 after division.

Oh, it looks that backends now should specify register size in bits. I've
updated my code, but it would be nice if 'getSpillAlignment' encode this
information in the name, for example 'getSpillAlignmentInBits' or
'getBitsSpillAlignment'.

- Volodya

3

Sorry about that, I should have remembered that you had code outside the
tree that would be broken. The ultimate goal is to convert everything to
be expressed in bits, instead of the mix of bits and bytes that we have
now. Sorry again for breaking your target! I think you just need to
change the register class declarations in your .td file to fix it if you
haven't already.

-Chris