I have been reading the BLOG about the LLVM MC Project and have a number of queries about ARM support.
1) When is it anticipated that the ARM assembler will reach production quality?
2) Is the complete ARMv7 ISA supported?
3) Is the syntax used by the ARM assembler/disassembler that used by GAS or are there incompatibilities?
4) What is the current state of the ARM instruction parser and instruction encoder? Are they complete and production
quality ? If not when would you expect this to occur?
5) The BLOG states that the instruction parser may use a more abstract internal representation than the MCInst used by the
instruction encoder requiring an IR lowering phase in the assembler backend. Is this the case for ARM?
Thank you
Graham Barber
Analog Devices Inc.
I have been reading the BLOG about the LLVM MC Project and have a number of queries about ARM support.
1) When is it anticipated that the ARM assembler will reach production quality?
Soon.
2) Is the complete ARMv7 ISA supported?
That's the idea. Is there anything in particular you're interested in?
3) Is the syntax used by the ARM assembler/disassembler that used by GAS or are there incompatibilities?
Unified syntax only. There's no support for the old divided syntax. There may also be weird gas specific syntax idioms that we don't support, but those should be few and far between. The idea is to be a viable drop-in replacement for the system assembler within those restrictions.
4) What is the current state of the ARM instruction parser and instruction encoder? Are they complete and production
quality ? If not when would you expect this to occur?
Encoder is beta quality, parser is alpha.
5) The BLOG states that the instruction parser may use a more abstract internal representation than the MCInst used by the
instruction encoder requiring an IR lowering phase in the assembler backend. Is this the case for ARM?
Well, it's not an IR lowering, it's an instruction matching, but conceptually speaking, yes. All MC parsers do this.
-Jim