The llvm backend uses class Instruction in IR handle stage, create SDVaule and DAG in DAG translation stage and class MachineInstr in Machine instruction translation stage.
Can I access class Instruction from DAG structure or stage, or access DAG and Instruction from MachineInstr structure or stage?
From SDNode and MachineInstr class, I see no link between them and IR/SDNode. The other places you can check are SelectionDAGBuilder  and InstrEmitter , which responsible for translating IR to SDNode, and SDNode to MachineInstr respectively.
I know you can retrieve the corresponding BasicBlock for a MachineBasicBlock, which is easy. However, since we will do lowering and combine during IR to SDNode transformation, I think it’s hard to track the relationship. Not sure it’s the same for SDNode to MachineInstr transformation, though.
It might be a more useful to know what it is you need from the IR in the DAG or what it is you r trying to do?
I am working on llvm gpu backend. The instruction metadata can only get in IR (class instruction). In DAG stage, the instructions are reordered, so I cannot map the metadata to correct instruction if I cannot access instruction from DAG or MachineInstr structure.
SelectionDAGBuilder contained within SelectionDAGISel has a map (NodeMap) b/w Value (Instruction) and corrosponding dag value (SDValue).
Isn’t that usable for your purpose.
Seems llvm cannot pass metadata to MachineInstr, or setting operand description in class Instruction and pass to class MachineInstr.
Is it a good idea to extend llvm kernel structure to having this feature?
I’d recommend you writing RFC to the list to explain the motivation and how you want to do, so that others in interested might have a look.
Look at the Metadata classes (MDNode for bitcode, SDNodes have their own type). They’re pretty easy to extend and preserve down to the code lowering phase if I’m remembering correctly.
Just go through DILocation (a specialized meta data created for dwarf) flow through IR->SDNode->MI.
MDNode is fundamental unit which is encapsulated into MDNodeSDNode in DAG
and MachineOperand kind = MO_metadata in MI phases.