I am trying to write a backend for an architecture that has two types of conditional branches:
1. An instruction that compares a register against zero, and branches if a condition is met, e.g. GT zero.
2. An instruction that uses the results of a preceding compare. The compare generates in a general register a bunch of bits that are set if various conditions are true. The conditional branch tests a single bit in the general register and branches if it is set.
I need some hints on which branch related operations (BRCOND, BR_CC, SELECT, SELECT_CC, SETCC) should be custom and which should be expanded?
Are there other backends with similar branch instructions? PowerPC has the branch-on-bit approach but with a specific register with the condition bits.