Assume an architecture that has multiple condition code registers, e.g., powerpc.
Now assume that there are predicate instructions like thumb2, but can specify
which condition code register they refer to.
Now also assume that these predicate instructions themselves are predicatible,
if executed they change the current predication state.
Can LLVM handle multiple levels of predication?
When is IfConversion used and when is EarlyIfConversion used?
Is there any documentation on this?
As far as I know, the EarlyIfConversion pass is used before register
allocation. It works on SSA form and it does not use predication.
The IfConversion pass is used after register allocation and it uses
predication. Unfortunately, it does not support multiple predication.
I hope it helps you.
2020년 3월 24일 (화) 오후 6:22, Bagel via llvm-dev <firstname.lastname@example.org>님이 작성:
EarlyIfConversion is too early for my use. It does appear that perhaps IfConversion can be used prior to register allocation. There is a line
PreRegAlloc = MRI->isSSA();
I don't think any in-tree architectures use IfConverter pre register allocation, but perhaps there are out-of-tree uses?
I do not think it is possible to run the ifconversion pass before register allocation.
As far as I know, ths pass does not handle ‘PHI’ because it assumes input after register allocation.
The pass uses ‘BranchFolder’, which assumes to run after register allocation, to tidy up CFG because the ifconversion pass generates quite dirty CFG.
It could be good try to run the pass before register allocation in order to find the issues.