My understanding is that it doesn’t. It simply remembers the original LLVM IR pointer via the MachineMemOperand. That’s what the
(dereferenceable load (s32) from ...) bit is about in the MIR dump I quoted.
The only real extension on top of that is a constant offset, so that the backend can track cases where a big load/store in LLVM IR is split up into multiple machine instructions.
What I’m suggesting is that we just don’t do that. Instead, we make sure that all the
p7 virtual registers get legalized into separate virtual registers, one that is
<4 x s32> and one that is
s32, before anybody ever asks questions like “how many registers do you need for this”.
Right, and it’s a pretty important improvement. That’s why I think addrspace(8) is a pretty good compromise while we still need to deal with SelectionDAG.