[RFC] Intel AMX programming model


Several months ago, we have some discussion for Intel AMX programming model in llvm-dev. H.J. post the AMX ABI at [1], and I sent the design for the programming model at [2]. Thank Hal, Philip for the time to review the design and provide good ideas to improve the design. After that I implemented the patch [4] and it is reviewed in LLVM community. The patch covers 6 components.

  1. The c interface to end user.

  2. The AMX intrinsics in LLVM IR.

  3. The Lowering from AMX intrinsics to AMX pseudo instruction.

  4. Insert psuedo ldtilecfg and build the def-use between ldtilecfg to amx intruction.

  5. The register allocation for tile register.

  6. Morph AMX pseudo instruction to AMX real instruction.

If there is no objection for the patch, I’d like to land it.

[1] http://lists.llvm.org/pipermail/llvm-dev/2020-August/143972.html

[2] http://lists.llvm.org/pipermail/llvm-dev/2020-August/144302.html

[3] http://lists.llvm.org/pipermail/llvm-dev/2020-September/145200.html

[4] https://reviews.llvm.org/D87981



Hi Yuanke,

As I said on the review, I think at least Craig should have a look and approve before landing, as this is a major change in the x86 back-end.


Hi Renato,

We have internal review with Craig on the design before, and I agree with you that it is nice that Craig can take the time to review and approve the patch.

Hi Craig,

Would you review my patch?