> Similar issue with aligned extload widening. The load and store are both
> i16 in IR.
> struct s {
> int x; // force alignment
> short y;
> };
> void g();
> short f2(s *a, short b) {
> a->y = b;
> g();
> return a->y - b;
> }
> produces this
> movq %rdi, %rbx
> movw %bp, 4(%rdi) // 2 byte store
> callq g()
> movl 4(%rbx), %eax // 4 byte load
> subl %ebp, %eax
> ~Craig
It is caused by loadi32:
def loadi32 : PatFrag<(ops node:$ptr), (i32 (unindexedload node:$ptr)), [{
LoadSDNode *LD = cast<LoadSDNode>(N);
ISD::LoadExtType ExtType = LD->getExtensionType();
if (ExtType == ISD::NON_EXTLOAD)
return true;
if (ExtType == ISD::EXTLOAD) // *
return LD->getAlignment() >= 4 && LD->isSimple(); // *
return false;
}]>;
Without the commented lines, movzwl should be generated.