RISC-V LLVM sync-up call 13th May 2021

For background on these calls, see

Reminder: the purpose is to coordinate between active contributors.
If you have support questions etc then it's best to post to llvm-dev.

We have a call every alternate Thursday at 4pm BST, via
<https://meet.google.com/ske-zcog-spp&gt;\. If you have topics to discuss,
please email me ahead and I can add them to the agenda.

We have a shared calendar that may help in keeping track, which is
accessible at:
* <https://calendar.google.com/calendar/b/1?cid=bG93cmlzYy5vcmdfMG41cGtlc2ZqY25wMGJoNWhwczFwMGJkODBAZ3JvdXAuY2FsZW5kYXIuZ29vZ2xlLmNvbQ&gt;
* <https://calendar.google.com/calendar/ical/lowrisc.org_0n5pkesfjcnp0bh5hps1p0bd80%40group.calendar.google.com/public/basic.ics&gt;

* Builtin function naming <https://github.com/riscv/riscv-c-api-doc/issues/19&gt;
* msave-restore with tailcall patches ⚙ D91719 [RISCV] Add support for using -msave-restore with tailcalls
⚙ D91720 [RISCV][compiler-rt] Add __riscv_restore_tailcall_N entry points
Describe the tailcall version of the __riscv_restore_N functions by edward-jones · Pull Request #10 · riscv-non-isa/riscv-toolchain-conventions · GitHub
* Deprecated aliases for CSRs <Login;
* Demand-based vsetvli insertion pass <Login;
* Clang test time. See <⚙ D99741 [RISCV][Clang] Add some RVV Floating-Point intrinsic functions. (vfclass, vfmerge, vfrec7, vfrsqrt7, vfsqrt); and
* Heads-up on relevant psABI patches:
https://github.com/riscv/riscv-elf-psabi-doc/pull/190 and
Draft of ZFINX ABI: ilp32x and lp64x by kito-cheng · Pull Request #189 · riscv-non-isa/riscv-elf-psabi-doc · GitHub