# RISC-V LLVM sync-up call 19th August 2021

**URL:** <https://discourse.llvm.org/t/risc-v-llvm-sync-up-call-19th-august-2021/58786>\
**Category:** LLVM Dev List Archives\
**Created:** [August 19, 2021, 12:02pm UTC](https://discourse.llvm.org/t/risc-v-llvm-sync-up-call-19th-august-2021/58786 "2021-08-19T12:02:11Z")\
**Posts on this page:** 1\
**Page:** 1

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**Author:** ![asb](https://sea1.discourse-cdn.com/flex021/user_avatar/discourse.llvm.org/asb/32/2119_2.png) [@asb](https://discourse.llvm.org/u/asb)\
**Post date:** [August 19, 2021, 12:02pm UTC](https://discourse.llvm.org/t/risc-v-llvm-sync-up-call-19th-august-2021/58786/1 "2021-08-19T12:02:11Z")

</div>

For background on these calls, see  
\<[http://lists.llvm.org/pipermail/llvm-dev/2019-September/135087.html&gt;\](http://lists.llvm.org/pipermail/llvm-dev/2019-September/135087.html&gt;%5C).

Reminder: the purpose is to coordinate between active contributors.  
If you have support questions etc then it's best to post to llvm-dev.

We have a call every alternate Thursday at 4pm BST, via  
\<[https://meet.google.com/ske-zcog-spp&gt;\](https://meet.google.com/ske-zcog-spp&gt;%5C). If you have topics to discuss,  
please email me ahead of time and I can add them to the agenda.

We have a shared calendar that may help in keeping track, which is  
accessible at:  
\* \<[https://calendar.google.com/calendar/b/1?cid=bG93cmlzYy5vcmdfMG41cGtlc2ZqY25wMGJoNWhwczFwMGJkODBAZ3JvdXAuY2FsZW5kYXIuZ29vZ2xlLmNvbQ&gt](https://calendar.google.com/calendar/b/1?cid=bG93cmlzYy5vcmdfMG41cGtlc2ZqY25wMGJoNWhwczFwMGJkODBAZ3JvdXAuY2FsZW5kYXIuZ29vZ2xlLmNvbQ&gt);  
\* \<[https://calendar.google.com/calendar/ical/lowrisc.org\_0n5pkesfjcnp0bh5hps1p0bd80%40group.calendar.google.com/public/basic.ics&gt](https://calendar.google.com/calendar/ical/lowrisc.org_0n5pkesfjcnp0bh5hps1p0bd80%40group.calendar.google.com/public/basic.ics&gt);

Agenda:  
\* LLVM 13.0 - any pending backport requests (bugfixes etc)?  
\* Standing of RVV v1.0-rc changes (ref:  
[⚙ D105690 [RISCV] Rename assembler mnemonic of unordered floating-point reductions for v1.0-rc change](https://reviews.llvm.org/D105690#2925485)) - checking we're aligned on  
how to handle this  
\* Unify arch string parsing logic to RISCVISAInfo  
\<[Login](https://reviews.llvm.org/D105168&gt);  
\* Encoding arch information in a new riscv-isa-features module flag  
\<[Login](https://reviews.llvm.org/D106347&gt);  
\* Proposal to add .option arch  
\<[https://github.com/riscv/riscv-asm-manual/pull/67&gt](https://github.com/riscv/riscv-asm-manual/pull/67&gt);  
\* Heads up on other RISC-V standards related PRs/issues. Many thanks  
to Luís Marques for collecting these. We won't walk through them in  
the meeting, I'll just ask if there are any that someone wants to draw  
particular attention to or discuss.  
&nbsp;&nbsp;\* Describe the behaviour of the linker for ABI mismatches  
\<[https://github.com/riscv/riscv-toolchain-conventions/pull/15&gt](https://github.com/riscv/riscv-toolchain-conventions/pull/15&gt);  
&nbsp;&nbsp;\* Add option to specify version of privilege and debug spec  
\<[https://github.com/riscv/riscv-toolchain-conventions/pull/16&gt](https://github.com/riscv/riscv-toolchain-conventions/pull/16&gt);  
&nbsp;&nbsp;\* Add new bind\_now directive  
\<[https://github.com/riscv/riscv-asm-manual/pull/64&gt](https://github.com/riscv/riscv-asm-manual/pull/64&gt);  
&nbsp;&nbsp;\* Add mapping symbol \<[https://github.com/riscv/riscv-elf-psabi-doc/pull/196&gt](https://github.com/riscv/riscv-elf-psabi-doc/pull/196&gt);  
&nbsp;&nbsp;\* Add lga pseudo-instructions  
\<[https://github.com/riscv/riscv-asm-manual/pull/69&gt](https://github.com/riscv/riscv-asm-manual/pull/69&gt);  
&nbsp;&nbsp;\* Add new RVV macros \<[https://github.com/riscv/riscv-c-api-doc/pull/21&gt](https://github.com/riscv/riscv-c-api-doc/pull/21&gt);  
&nbsp;&nbsp;\* Define enum storage in the psABI  
\<[https://github.com/riscv/riscv-elf-psabi-doc/pull/209&gt](https://github.com/riscv/riscv-elf-psabi-doc/pull/209&gt);  
\* AOB

Best,

Alex