RISC-V LLVM sync-up call 30th Jan 2020

For background on these calls, see
<http://lists.llvm.org/pipermail/llvm-dev/2019-September/135087.html>.

Reminder: the purpose is to co-ordinate between active contributors.
If you have support questions etc then it's best to post to llvm-dev.

We have a call each Thursday at 4pm GMT, via
<https://meet.google.com/ske-zcog-spp>.

I've created a shared calendar which may help in keeping track, which
is accessible at:
  * <https://calendar.google.com/calendar/b/1?cid=bG93cmlzYy5vcmdfMG41cGtlc2ZqY25wMGJoNWhwczFwMGJkODBAZ3JvdXAuY2FsZW5kYXIuZ29vZ2xlLmNvbQ>
  * <https://calendar.google.com/calendar/ical/lowrisc.org_0n5pkesfjcnp0bh5hps1p0bd80%40group.calendar.google.com/public/basic.ics>

Issues to discuss today include the following:
* 10.0 status
  * No new requests or known regressions in the past week
  * We agreed that a backport request could be made for the scheduler
patch (which has now landed) if someone wanted to champion it. Nobody
seems to have kicked off the request that I've seen?
* RISC-V ELF attribute spec and support in LLVM
<https://github.com/riscv/riscv-elf-psabi-doc/pull/71>
* Next steps on RFC for yet-to-be-ratified extensions support in
upstream LLVM <http://lists.llvm.org/pipermail/llvm-dev/2020-January/138554.html>
* No other topics were submitted, so it could be a fairly quick call
this time! As always, please do submit things you'd like to discuss

Best,

Alex

Hi all,

Following on from the call, here are the Bitmanip patches being mentioned:

Adding MC layer instruction encodings: https://reviews.llvm.org/D65649

Adding codegen pattern matching: https://reviews.llvm.org/D67348

Adding clang frontend support: https://reviews.llvm.org/D71553
This adds the __riscv_bitmanip macro and the 'b' target feature to
enable it.

We had looked at two different implementations of intrinsics:

Using inline asm in clang headers: https://reviews.llvm.org/D67661
or using LLVM intrinsics: https://reviews.llvm.org/D66479

Please take a look and let us know which implementation is preferable.
We will update the header patch to rely on the intrinsics if that is
preferred rather than inline asm.

And Simon's compress instructions based on function features patch:
https://reviews.llvm.org/D73339

Thanks,
Scott