RISC-V LLVM sync-up call 7th May 2020

For background on these calls, see
<http://lists.llvm.org/pipermail/llvm-dev/2019-September/135087.html>.

Reminder: the purpose is to co-ordinate between active contributors.
If you have support questions etc then it's best to post to llvm-dev.

We have a call each Thursday at 4pm BST, via
<https://meet.google.com/ske-zcog-spp>.

I've created a shared calendar which may help in keeping track, which
is accessible at:
  * <https://calendar.google.com/calendar/b/1?cid=bG93cmlzYy5vcmdfMG41cGtlc2ZqY25wMGJoNWhwczFwMGJkODBAZ3JvdXAuY2FsZW5kYXIuZ29vZ2xlLmNvbQ>
  * <https://calendar.google.com/calendar/ical/lowrisc.org_0n5pkesfjcnp0bh5hps1p0bd80%40group.calendar.google.com/public/basic.ics>

I'm actually out-of-office today and won't be available to dial-in,
but my colleagues Sam Elliot and Luis Marques will host today's
sync-up.

Issues to discuss today include the following:
* RVV intrinsics
* SiFive interrupt attributes and CLIC CSRs <https://reviews.llvm.org/D79521>,
  <https://reviews.llvm.org/D79509>
* Latest updates from differential testing and optimisation work. e.g.
  <https://reviews.llvm.org/D79492>,
<https://reviews.llvm.org/D79523>, <https://reviews.llvm.org/D79268>
* Bitmanip codegen next steps
* ExtInt ABI <https://reviews.llvm.org/D79118>
  * Mainly a heads up - LGTM, though we normally let the backend
handle large scalars rather than relying on the frontend to convert to
sret etc. I think we need more testing of arbitrary-width integers in
the backend
* No other topics were submitted, as always, please do submit things
you'd like to discuss

Best,

Alex