RISC-V Zbb Extension ROR/ROL 32 bit Support

I wondered if 32 bit RISC-V target can have ROR/ROL instructions of the Zbb extension. The extension states that rol/ror and rori are supported in both 32 bit and 64 bits. However I suspect when the target is not 64 bits ISD::ROTR and ISD::ROTL do not get legalized. The code snippet I based this thought on is in RISCVISelLowering.cpp:

  if (Subtarget.hasStdExtZbb() || Subtarget.hasStdExtZbkb() ||
      Subtarget.hasVendorXTHeadBb()) {
    if (Subtarget.is64Bit())
      setOperationAction({ISD::ROTL, ISD::ROTR}, MVT::i32, Custom);
  } else {
    setOperationAction({ISD::ROTL, ISD::ROTR}, XLenVT, Expand);

I would like to ask the reason for the expansion in RV32.

The else is for the outer not the inner if.