SchedClasses

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1

Hi all,

I am looking at the scheduling model of the ThunderX2. I am trying to figure out the cost of the LDADDALX instruction. The following program’s output is:
name LDADDALX; class 872
microops 65535
I would have assumed that the microops are less than 20. The ThunderX2 has a detailed cost model for LSE. Could somebody tell me what I am doing wrong?

Cheers,
  Tom

#define GET_REGINFO_ENUM
#include "AArch64GenRegisterInfo.inc"

#define GET_INSTRINFO_ENUM
#include "AArch64GenInstrInfo.inc"

#define GET_SUBTARGETINFO_ENUM
#include "AArch64GenSubtargetInfo.inc"

#include "llvm/MC/MCSchedule.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCInstrDesc.h"
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/SubtargetFeature.h"
#include "llvm/MC/MCSubtargetInfo.h"

#define GET_INSTRINFO_MC_DESC
#include "AArch64GenInstrInfo.inc"

#define GET_SUBTARGETINFO_MC_DESC
#include "AArch64GenSubtargetInfo.inc"

#define GET_REGINFO_MC_DESC
#include "AArch64GenRegisterInfo.inc"

int main(int argc, char **argv) {
  llvm::MCInstrInfo II;

  llvm::InitAArch64MCInstrInfo(&II);

  llvm::StringRef ref = II.getName(llvm::AArch64::LDADDALX);
  llvm::MCInstrDesc d = II.get(llvm::AArch64::LDADDALX);

  printf("name %s; class %d\n", ref.str().c_str(), d.SchedClass);

  printf("microops %d\n", llvm::ThunderX2T99Model.getSchedClassDesc(d.SchedClass)->NumMicroOps);

  return 0;
}

/*
   LDADDALB_LDADDALH_LDADDALW_LDADDALX = 872, in Sched enum
*/

2

I bet the problem is that “WriteAtomic” is marked unsupported, so it gets an invalid sched class. The invalid NumMicroOps means that the scheduler will assert if it ever sees that instruction.

def : WriteRes<WriteAtomic, > {
  let Unsupported = 1;
  let NumMicroOps = 2;
}

def : InstRW<[THX2T99Write_16Cyc_I012, WriteAtomic],
            (instrs LDADDALB, LDADDALH, LDADDALW, LDADDALX)>;

To debug things like this, look in AArch64GenSubtargetInfo.inc. Or use the schedcover.py script.

-Andy

3

​The scheduler does not assert if it sees LDADDAL, or any other of the LSE
instructions on ThunderX2. We've been generating LSE code for months now,
with LLVM built in debug+assert+expensive-checks mode.

--Stefan​

4

The machine model should assert whenever it sees an “unsupported” instruction and the machine model is marked “complete". The scheduler used to have such an assert, but some concessions have been made to handle “incomplete” machine models. Currently, it looks like it picks some default values.

Can you file a bug showing the relevant part of AArch64SchedThunderX2T99.td (CompleteModel=1, WriteAtomic…), a self-contained dump of the machine instrs before scheduling, and -debug-only="machine-scheduler” output? Failing to catch this at compile time is pretty horrible.

-Andy