Scheduling defs and uses close in PreRA

Project Infrastructure LLVM Dev List Archives
1

Hi everyone,

Here, Florian Hahn talks about PreRA instruction scheduling: https://youtu.be/brpomKUynEA?t=582

Florian mentions that one of its main goals is to schedule defs and uses closer together to shorten live ranges and decrease the chance of spills. My question is: where is the code that specifically implements this logic of putting defs and their corresponding uses closer together? I was expecting to find relevant code in MachineScheduler.cpp GenericScheduler but couldn’t. Any pointers would be appreciated.

Best,

Alex

2

Hi Alex,

Any of the heuristics that minimize register pressure would tend to shorten live ranges. Machine schedulers can certainly add their own heuristics on top of that.

-Andy