Spill code

Hi,

Is it possible to add a spill code (a pair of store /load ) to the machinecode in a pass before the instruction emitter? If so, how can I calculate the address (offset to the sp) for the spill store/load instructions?
Thanks

Hi Fateme,

Is it possible to add a spill code (a pair of store /load ) to the
machinecode in a pass before the instruction emitter?

Do you mean during the SelectionDAG phase? If so, the very rough
outline would be something like:

  MachineFrameInfo *MFI = MF.getFrameInfo();
  int Idx = MFI->CreateStackObject(Size, Align);
  SDValue FI = DAG.getFrameIndex(Idx, PtrVT);
  DAG.getStore(Chain, DL, WhateverVal, FI);

The keyword to grep for in the existing code is probably
"CreateStackObject", possibly also "CreateFixedObject" (see later).
Various backends to something along those lines for arguments that get
passed in on the stack and so on.

If so, how can I calculate the address (offset to the sp) for the spill store/load
instructions?

The offset to SP during the function's execution isn't decided until
much later (LLVM may need more or less stack space depending on how
many spills *it* decides is necessary). For things that don't need to
have a fixed location, you usually don't need to know it early either
so you'd just use instructions referencing the FrameIndex. Later
passes will then fill in the offsets properly.

If you really, really want to you can use CreateFixedObject, which
will have a set position relative to SP immediately on function entry,
but you'd have to be aware of and handle that in XYZFrameLowering too,
I expect.

Cheers.

Tim.

Hi Tim,
Thanks for your reply. My goal is to do some optimizations on the final assembly code. I want to do register renaming in the code hotspot and I need to spill some registers before entering some loops. And later, reload them after exiting the loop.
So I guess I don’t want it to be in the SelectionDAG, it’s after register allocation and everything and before emitting the instructions.
My target architecture is ARM. I have a sample code like this:

str r2, [sp, #8] @ 4-byte Spill
ldrb r2, [r4, r12]!

and in another code
str r1, [sp, #52] @ 4-byte Spill

and both of them are the first spills in the code. so why #8 in one and #52 in the other?

Now assume I want to spill some variable at the end of some basic blocks in a program, I should create a store and give it an offset, but how to decide what it should be.
Thanks again,
Fateme

Thanks for your reply. My goal is to do some optimizations on the final
assembly code. I want to do register renaming in the code hotspot and I need
to spill some registers before entering some loops. And later, reload them
after exiting the loop.

Ah, sorry. Much much later than SelectionDAG.

My target architecture is ARM. I have a sample code like this:

str r2, [sp, #8] @ 4-byte Spill
ldrb r2, [r4, r12]!

and in another code
str r1, [sp, #52] @ 4-byte Spill

and both of them are the first spills in the code. so why #8 in one and #52
in the other?

I *think* the pass that assigns the offsets is in
lib/CodeGen/StackSlotColoring.cpp (not really my area). Most spills
are inserted by the register allocator, which also puts in FrameIndex
values to be resolved later. The code is pretty generic, so any given
spill-slot could end up anywhere.

If you knew early on how much space you'd need, you might still be
able to call "CreateStackObject", record the FrameIndex and then use
it later. The only question is whether you can call
XYZRegisterInfo::eliminateFrameIndex at that late stage yourself (I've
never had to try).]

Now assume I want to spill some variable at the end of some basic blocks in
a program, I should create a store and give it an offset, but how to decide
what it should be.

If you're creating a self-contained island, you could just create more
offsets with push/pop. As long as there are no function calls, you
don't even need to worry about ABI SP alignment requirements.

Of course, in the big picture enhancing the register allocator so that
it does the job better is probably optimal.

Cheers.

Tim.