Spill hoisting on RAL: looking for some debugging ideas

Project Infrastructure LLVM Dev List Archives
1

Hi,

I am debugging private backend and faced interesting problem:
sometimes spill hoisting creates double stores.

(some output from -debug-only=regalloc).

First hoisting:

Checking redundant spills for 0@16r in %vreg19
[16r,144B:0)[144B,240B:1)[240B,280r:2)[296r,416B:3)[416B,456r:4)[472r,592B:5)
0@16r 1@144B-phi 2@240B-phi
3@296r 4@416B-phi 5@472r
Merged to stack int: SS#0 [16r,592B:0) 0@x
hoisted: 16r STbo %vreg19, <fi#0>

Second below:

Checking redundant spills for 0@16r in %vreg19
[16r,96B:0)[144B,240B:1)[296r,416B:2)[416B,456r:3)[472r,592B:4) 0@16r
1@144B-phi 2@296r 3@416B-phi 4@472r
Merged to stack int: SS#0 [16r,592B:0) 0@x
  hoisted: 16r STbo %vreg19, <fi#0>

Result just prior to rewriting:

20B STbo %vreg19, <fi#0>
24B STbo %vreg19<kill>, <fi#0>

2

Hi,

I found source of error: I have pair of hooks isLoadFromStackSlot /
isStoreToStackSlot unimplemented in mine backend. After
implementation, store hoisting started to work fine.