Status of LLVM ARM port

Good day,

I have looked around for this information, but I have not been able to gain a clear understanding: what is the status of the LLVM ARM backend? That is, do the following work:

  1. Generating Thumb code: I saw a video online where they describe an issue with using the ARM Thumb back-end

  2. Generating code for ARM9 (ARMv5?) or ARM7 (ARMv4): again, the same presentation mentioned that it only generated ARMv6 or 7. Does the back end work on older ARM processors today?

I have seen the notes on the Apple provided bits to the project, but those were form early-mid 2007, and I have not seen a clear declaration on what is marked as working or not.

Thank you,

Tyler

Good day,

I have looked around for this information, but I have not been able to gain a clear understanding: what is the status of the LLVM ARM backend? That is, do the following work:

  1. Generating Thumb code: I saw a video online where they describe an issue with using the ARM Thumb back-end

Thumb works. But it generate poor code.

  1. Generating code for ARM9 (ARMv5?) or ARM7 (ARMv4): again, the same presentation mentioned that it only generated ARMv6 or 7. Does the back end work on older ARM processors today?

ARM v6 is known to work well. I am not sure about v4 and v5. They should mostly work, but I don’t test them. There is no support for v7.

I have seen the notes on the Apple provided bits to the project, but those were form early-mid 2007, and I have not seen a clear declaration on what is marked as working or not.

There hasn’t been a lot of activities in ARM target. Patches welcome!

Evan

I have a question regarding ARM support. It was mentioned in mails below that LLVM supports ARM v6 but a lot of ARM v6 instructions are actually missing from ARM ISA description files( e.g. Media Instructions). Is there any documentation mentioning the unsupported parts of v6 version

Thanks

–Kapil

Can you give some examples of missing instructions?

Evan

Media instructions like - parallel add and subtract, Sign/Zero Extend and Add instructions seem to be missing from ARM target support. These instructions are not listed in GenInstrNames.inc

Kapil

Right. Those are not currently supported. Patches welcome. :slight_smile:

Evan

These would be best supported by adding builtins to llvm-gcc and adding intrinsics to llvm. Some of them could be implemented as <2 x i16> operations as well.

Any help to implement this support would be great,

-Chris

I have one more question regarding ARM codegen support. Is it possible to pass a flag to Codegen to generate only ARMv5 instructions and not to use instructions from higher versions, ( In other words, is this version specific information present in LLVM codegen?)

Thanks

Kapil

llc -mattr=+v5e,-v6

See ARM.td for subtarget features.

Evan