Subregister definition / use


I can’t find a way to define a subregister in a MI, while using another subregister in the same MI.

For example:

reg:low = OP reg:hi, rhs

I really need the reg:low to be part of the same register as reg:hi, but when I use REG_SEQUENCE, this does not happen - I instead get
regC = OP reg:hi, rhs
reg:low = regC

This is not good enough for me. What should I do?


LLVM doesn’t support this kind of constraint in its default register allocators.

You may be able to get the PBQP allocator to enforce the constraint.

Alternatively, model your instruction as reading and writing the full register with a normal two-addr constraint.