TableGen Calling Convention help

With my backend code gen I want to assign calling parameters to a list
of registers, but since I'm targeting a virtual instruction set. I don't
want to be limited by the number of registers. Is there a way using
TableGen to specify just a starting register to assign to for the
CallingConv class and then have it just use sequential registers?

Micah Villmow

Systems Engineer

Advanced Technology & Performance

Advanced Micro Devices Inc.

4555 Great America Pkwy,

Santa Clara, CA. 95054

P: 408-572-6219

F: 408-572-6596

No; you'll have to hack it to deal with an infinite register file.
The relevant bits are include/llvm/CallingConvLower.h,
utils/TableGen/CallingConvEmitter.cpp, and
lib/Target/ None of the current LLVM targets
using CodeGen have infinite registers.

Although, what exactly is the calling convention? Are the arguments
supposed to be in registers r0-rN, where N is the number of arguments?
Or is there some way of specifying which registers to pass? Where
does the caller save registers? Or does the target use something like
SPARC register windows?


  Yeah, I'd say it would be similar to be register rN-rN+J, where J is
the number of registers and N is some offset large enough to not
conflict with the register allocator. I've found a way to get it done by
just specifying the numbers as an offset of the last register defined in, but I'm not sure this is the correct way. I'll take a
look at what you mentioned and see if I can figure a way out to do what
I want to do.