TableGen change in LLVM 3.9 allows only prefix instruction notation

     I am curious why did you changed TableGen to allow in principle only writing ASM instructions in prefix notation. I ask because I personally use an assembly notation that is infix (I could use a simple preprocessor that changes prefix to infix).

     Just to mention: I found the solution to this - the following part of the code is responsible for this from llvm/utils/TableGen/AsmMatcherEmitter.cpp (so it needs to be commented to be disabled):
        // The first token of the instruction is the mnemonic, which must be a
        // simple string, not a $foo variable or a singleton register.
        if (AsmOperands.empty())
                        "Instruction '" + TheDef->getName() + "' has no tokens");

        if (HasMnemonicFirst) {
          Mnemonic = AsmOperands[0].Token;
          if (Mnemonic[0] == '$')
                            "Invalid instruction mnemonic '" + Mnemonic + "'!");

          // Remove the first operand, it is tracked in the mnemonic field.
        } else if (AsmOperands[0].Token[0] != '$')
          Mnemonic = AsmOperands[0].Token;

   Thank you,

Running "git blame" points at, which gives the
reasoning and suggests you ought to be able to set "HasMnemonicFirst".


     Tim, thanks for pointing me out to .
     I followed the example there and:
       - left utils/TableGen/AsmMatcherEmitter.cpp unchanged (no more commenting of the lines I said I did comment in the previous email)
       - following I added in my file:
         def MyTargetAsmParser : AsmParser {
           bit HasMnemonicFirst = 0;
         let AssemblyParsers = [MyTargetAsmParser];

      By doing these steps I was (again) able to use infix ASM instruction notation.

   Thank you,