Tablegen: How to define an instruction that reads and writes the same register


Is it possible to define an Instruction with tablegen that reads and
writes the same register? For example, an increment instruction that
reads a value from a register, adds one to it and then writes the result
back to the same register.


Yes; you just write the instruction as if the dest and src are
distinct, then specify 'let Constraints = "$src1 = $dst"'. See for
example INC32r in the x86 backend.


Hi Tom

This is frequently done in the x86 target using a tablegen constraint.

For example, from we have

let Constraints = "$src1 = $dst" in {
def INC8r : I<0xFE, MRM0r, (outs GR8 :$dst), (ins GR8 :$src1),
               [(set GR8:$dst, EFLAGS, (X86inc_flag GR8:$src1))]>;