Tagging opcodes with supervisor restrictions for MCJIT

Hi All,

I’m sorry if this has come up before somewhere on the list, but:

Is it possible to tag those opcodes in the llvm bitcode that a) require supervisor (Ring 0) priviledge, or b) cause a trap, e.g. INT or SYSCALL on x86?

My reasoning for asking is that the new MCJIT is able to JIT embedded asm (containing such opcodes) but for implementing a sandboxed runtime environment it would be nice to be able to intercept such instructions and force a call to a JIT-host callback allowing the host to emulate kernel calls in the JIT executeable.

This would allow a JIT-based user-level ‘virtual machine’ runtime to be implemented without requiring special code layout and rules (as in Google’s Native Client), just a set of standard libraries providing wrappers to OS-level syscalls all compiled as llvm bitcode.

Am I right in thinking that the opcode information for each architecture is all defined by the TableGen tables, and a modification to that and the underlying MCInstr infrastructure is all that is required?

This is all very blue-sky thinking at the moment, but I may be able to do some of the development required once I have the opinions of those who know the guts of llvm better than I.

Many thanks

Rick Taylor

Tropical Storm Software Ltd.