The thing I wanted for mips 16 for large literals does not seem to exist right now.

They have MipsTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT)

but not the same thing for integer literals.

For Mips16, to materialize a 32 bit literal using instructions is expensive, both in terms of the number of registers and the number of instructions.

You always want to just do a load of the constant from the local text section using a PC relative load.

I could try and add this to the target independent section if there seems to be interest in this.

I might first prototype in the Mips target area.


Sorry you can materialize using instructions without a data load with just one register.

The main thing is that you always use at least 16 bits more by materializing with instructions (as opposed to a data load) and it can be as much as 48 bit more if the literal is repeated but even if it's not repeated, usually you will save 32 bits.