I’m working on fixing this bug (https://bugs.llvm.org/show_bug.cgi?id=38917, “Failure to hoist repeated vextractf128 from switch cases”) – actually, under-optimization. It’s not related to special arch or AVX inst. set, it will arise on many cases when llvm ir instr/intrinsic is splitting to several machine instrs (like vextract128->VEXTRACTF128rr+VPEXTRDmr) on this specific CFG (defined by switch-case structure). To hoist common subexpession successfully on such CFG, one need to use method eliminating partitial redundancy like GVN-PRE. I’m to implement this as separate MIR pass (actually I’m to copy and adopt llvm ir GVN-PRE pass).
Meanwhile I want to consult llvm dev – is it a good decision? May anyone has pros and cons of it?