TTA-based Co-design Environment (TCE) is a toolset for designing
application-specific processors based on the Transport Triggered
Architecture (TTA). The toolset provides a complete retargetable co-design
flow from high-level language programs down to synthesizable processor
RTL (VHDL and Verilog generation supported) and parallel program binaries.
Processor customization points include the register files, function units,
supported operations, and the interconnection network.
This release adds support for LLVM 3.8, and fixes a couple of bugs.
Get the release via git by running:
git clone -b release-1.13 email@example.com:cpc/tce.git tce-1.13