Use of movupd instead of movapd for x86

Hi all,

Is there a way to force llc to generate movupd instruction instead of movapd for x86 target ?

I know that movapd is more performant, but I would like to measure degradation when alignment constraints are not met.

Best Regards

Seb

Sebastien DELDON-GNB <sebastien.deldon@st.com> writes:

Hi all,

Is there a way to force llc to generate movupd instruction instead of movapd for x86 target ?

I know that movapd is more performant, but I would like to measure degradation when alignment constraints are not met.

On modern processors a movupd on aligned data is going to be
indistinguishable in performance from a movapd.

                               -Dave

You can hack loads and stores to have alignment of 1 in the IR, or hack LLC itself.

-Chris

Understood for the aligned case, I want to measure performance degradation for unaligned case.
I mean unaligned case versus aligned. I know this is stupid, but I want to try to pass a <4 x float>* as parameter of a routine and at the call site I want to pass a misaligned pointer. Since LLVM is generating movapd instruction it will raise an exception (SEGFAULT), I just want to know if there is a way to enforce
generation of movupd instruction instead of movapd.

Seb

Understood for the aligned case, I want to measure performance degradation for unaligned case.
I mean unaligned case versus aligned. I know this is stupid, but I want to try to pass a <4 x float>* as parameter of a routine and at the call site I want to pass a misaligned pointer. Since LLVM is generating movapd instruction it will raise an exception (SEGFAULT), I just want to know if there is a way to enforce
generation of movupd instruction instead of movapd.

If llvm is generating movapd then it believes the pointer is aligned. Without having more information it's impossible to tell what the issue is.

Evan

OK,

I found a work-around by adding ,align 8 to vector load/store.
Thanks all for your answers