using getTargetInsertSubreg in DAG

I’m not sure what I’m missing and was hoping someone could point it out to me.

We’d like to use a 16 bit intrinsic to do some work on a f32. The problem with the code is that we’re getting a f32 returned from the intrinsic when it should be a i16, so we are unable to pattern match. We’re trying to follow along the two examples in code code in SparcISelLowering.cpp.

given f(x, y), it should extract the upper bits of y and x, copy the bits from y specified in the bitmask to x and then reinsert the upper bits into x and return the f32.


SDLoc DL(Op);
EVT VT = Op.getValueType();

SDValue LHS = Op.getOperand(0);
SDValue RHS = Op.getOperand(1);

SDValue ConstMask = DAG.getConstant(0x8000, SDLoc(Op.getNode()), MVT::i16);
SDValue y_MSB = DAG.getTargetExtractSubreg(TARGET::sub_even, DL, MVT::i16, RHS);
SDValue x_MSB = DAG.getTargetExtractSubreg(TARGET::sub_even, DL, MVT::i16, LHS);
SDValue x_LSB = DAG.getTargetExtractSubreg(TARGET::sub_odd, DL, MVT::i16, LHS);

VT, DAG.getTargetConstant(Intrinsic::myIntrinsic,
DL, MVT::i16), y_MSB, ConstMask);

SDValue result = SDValue(DAG.getMachineNode(TargetOpcode::IMPLICIT_DEF,
DL, MVT::f32), 0);

result = DAG.getTargetInsertSubreg(TARGET::sub_even, DL, MVT::f32, result, x_MSB);
result = DAG.getTargetInsertSubreg(TARGET::sub_odd, DL, MVT::f32, result, x_LSB);

return result;

I found the bug on my end, a simple mistake with the typing of the intrinsic. Sorry for the spam.