Vmerge.vim unsupported instruction in llvm-mca

Code Generation RISCV
1

We have WriteVIMergeI defined in our scheduler model but llvm-mca returns:

// Check if this instruction is supported. Otherwise, report an error.
const MCSchedClassDesc &SCDesc = *SM.getSchedClassDesc(SchedClassID);
if (SCDesc.NumMicroOps == MCSchedClassDesc::InvalidNumMicroOps) {
return make_error<InstructionError>(
“found an unsupported instruction in the input assembly sequence.”,
MCI);
}

for merge.vim instruction. llvm-mca reports latency = 0, uOps = 8191 (implying this isn’t defined in the scheduler model?).

What am I missing here or is something wrong?

Thanks.

FYI: I see the same problem running the same code for sifive-x280.

2

This is probably a bug in one of my recent refactoring changes which was noticed and fixed a few days later in 86a9643dbfb70c72eb32278783407b1dffa5ee98. I expect that updating to ToT should resolve your problem.

3

Philip,

Ok, thanks. We just missed this commit in our latest ToT merge. I’ll cherry pick and check.