I am trying to build a DAG for a whole function. The first problem I met is to assign a user for the last instruction of each basic block, be it BRCOND or other node. There is no natural user for such nodes. Without user, it will be removed in later phases. My idea is to use it as chain for nodes in the next basic block. Is this reasonable?
-Zhongxing Xu
The first question is code placement. How is the compiler going to decide which block (or blocks) to emit an instruction in? The answer to that will help determine how control relationships should be represented.
Dan
At first I’ll try the simplest strategy: put the instruction in the machine BB corresponding to the LLVM BB where it comes from.
To implement this, I plan to add an operand to non-passive node which points to the BasicBlockSDNode which the node belongs to.
Another idea is to use a side map to map each node to its block. But I guess it’s difficult to keep the map consistent when transforming the DAG.
I have another idea: let the BasicBlockSDNode points to the last node in its predecessor blocks. But this will introduce cycles into the selection DAG, making it not a DAG anymore.
So what’s the impact of a non-DAG on the existing DAG legalizers and combiner?
At first I'll try the simplest strategy: put the instruction in the machine BB corresponding to the LLVM BB where it comes from.
To implement this, I plan to add an operand to non-passive node which points to the BasicBlockSDNode which the node belongs to.
This would inhibit cross-block CSE, which would be one of the main benefits of whole-function processing. What problem are you trying to solve?
Another idea is to use a side map to map each node to its block. But I guess it's difficult to keep the map consistent when transforming the DAG.
Yep.
Dan
Lots of stuff would break, for example anything that uses the topological sort facility.
Dan
But I guess non-DAG is inevitable since there is loop in the code and I want to represent control relationships in the graph.