Wrong RISCV assembly code for pseudo-LLA (Load Address) being generated since applying D99158.diff and D100288.diff patches

Code Generation RISCV
1

Hi all,

Since we applied the patch D100288.diff our RISCV backend generates incorrect code from assembly for pseudo-LLA (Load Address), for instance:

    la sp, _stack_top

gets translated to:

;       la sp, _stack_top
   4001e: 17 01 10 00   auipc   sp, 256
   40022: 03 31 a1 02   ld      sp, 42(sp)

while this should be:

        // Primary hart
        la sp, _stack_top
   4001e:       04501117                auipc   sp,0x4501
   40022:       e0210113                addi    sp,sp,-510 # 4540e20 <_stack>

meaning that ‘ld’ is being picked instead of ‘addi’ !
I appreciate if anyone could provide some insight or possible solution.

Thanks you in advance,
Hadi

2

LA and LLA are not the same thing. If you need the latter then use the latter, not the former.

3

See riscv-asm-manual/riscv-asm.md at master · riscv-non-isa/riscv-asm-manual · GitHub

1 Like
4

Many thanks for the info. My issue has been resolved, it appears that -fno-pic is also needed as an assembler flag.