Zen arch in 5.0?

Will 5.0 have scheduler, reg alloc etc. bits for explicit
support of AMD's 1st gen Zen (Ryzen, Epyc) arch?

Is it safe to assume that the changes for Zen's 2nd gen
will land prior to the hardware release, once the 1st
gen is added? I think zen2 will arrive next year.

Scheduler - yes.

So there's more patches in the pipeline to land, then?

We are preparing the patches for the scheduler. Regarding register allocator I don’t think there's anything big. Maybe minor tweaks. We need to work a bit more on the TTI and cost model though as there are differences between Intel and AMD on latencies/micro-coding of certain instructions.

Cant really comment on zen2 specifics at this point.

We are preparing the patches for the scheduler. Regarding register allocator I
don’t think there's anything big. Maybe minor tweaks. We need to work a bit
more on the TTI and cost model though as there are differences between Intel
and AMD on latencies/micro-coding of certain instructions.

Thanks for the info. In fact, I haven't checked gcc at all and since I have your
ear, I'm thinking out loud wondering how complete gcc 7.1's zen awareness is.
I remember diffs landing in gcc around mid-2015.

Cant really comment on zen2 specifics at this point.

No need to talk details. I'm only hoping that the diffs will be
applied early enough
to land in a release that happens before zen2 reaches customers. This
is important
for Linux distros but of utmost use for FreeBSD and other systems that
have clang
as the default host compiler. Apple is special in that they coordinate
hardware and
toolchains and are irrelevant there, but the ability to use optimal
march=native on
Gentoo etc. is more than nice to have. Hope this explain where I was trying to
get with the question. Thanks and keep up the good work at AMD!

This is all I'm asking/wondering and thanks for answering so far. I
won't bother/annoy
with more questions :).

Sorry for gmail borking the line breaks :(.

I'll refrain from posting for at least a week as punishment.