amdgpu
| Topic | Replies | Views | Activity | |
|---|---|---|---|---|
| [RFC] Desugar variadics. Codegen for new targets, optimisation for existing |
|
4 | 372 | November 16, 2023 |
| Confused by inconsistencies in GPU magic constants |
|
19 | 532 | September 18, 2023 |
| InferAddrSpace] The operand with non-FLAT-address-space got Undefined when rewriting its user to new address space |
|
28 | 422 | September 4, 2023 |
| The value of a constant global variable is random after linking for AMDGPU |
|
0 | 145 | July 18, 2023 |
| [RFC] Cleaning up the NVIDIA (and potentially AMD) GPU backend |
|
5 | 389 | June 29, 2023 |
| Loop unroller fails to unroll loop |
|
5 | 451 | April 12, 2023 |
| Catching up on uniformity analysis |
|
5 | 294 | February 13, 2023 |
| Convert NVIDIA GPU LLVM IR(NVVM) alloca instruction to AMDGPU's |
|
7 | 747 | September 9, 2022 |
| [TableGen/RegAlloc] How to use a fixed register in an instruction? |
|
5 | 536 | August 16, 2022 |
| [GISel/DAG] Getting a TableGen pattern to match both `G_ADD` and `G_PTR_ADD` in GISel |
|
0 | 200 | August 12, 2022 |
| Feedback on new flag for AMDGPU |
|
4 | 308 | February 22, 2022 |