Does anyone have any plans on working on constrained floating-point for the AArch64 backend this year? We’re willing to help out with the work as we can, and coordinating effort is a good thing. Anyone?
I have intention to implement some functionality on AArch64:
- setting rounding mode (as for x86 in https://reviews.llvm.org/D74730),
- getting/setting FP environment (as for x86 in https://reviews.llvm.org/D81833),
- getting/setting FP control modes (as for x86 in https://reviews.llvm.org/D83036),
- lowering of llvm.roundeven.
I don’t know if I actually would have time for these tasks. I would appreciate coordination with other interested parties on this topic.
I gave the talk and proof of concept on using portable SIMD for libmvec at the last LLVM dev mtg[1] and pointed out that this could support constrained rounding modes (which the original libmvec spec leaves out, but is now in LLVM’s language ref). My work on this stopped after the conference and nobody wanted to pay me, but I would be available for consulting on this.
Shawn Landden
[1] 2019 LLVM Developers’ Meeting: S. Landden “Using LLVM's portable SIMD with Zig” - YouTube