IR in SSA form?

Hi All,
When I run the following command
llvm-gcc -03 -emit-llvm test.cpp -c -o test.bc or llvm-gcc -emit-llvm test.cpp -c -o test.bc

on the program test.cpp, the IR representation is not in SSA form.
I do not see any phi functions.

program: test.cpp

int main(int argc, char **argv)
{
int a[2],i,j;
for(i=0;i<2;i++)
{
a[i] = i;
}
return a[1];
}

Any clarifications will be greatly appreciated. Thanks.

George

Hi All,
  When I run the following command
llvm-gcc -03 -emit-llvm test.cpp -c -o test.bc or llvm-gcc -emit-llvm test.cpp -c -o test.bc

on the program test.cpp, the IR representation is not in SSA form.
I do not see any phi functions.

Actually, it is in SSA form (or more precisely, the virtual registers are in SSA form; LLVM only puts virtual registers into SSA form). However, all program variables are code-generated to alloca instructions and then accessed using load and store instructions.

To lift stack-allocated variables into virtual registers (essentially putting them into SSA form), run the mem2reg pass (opt -mem2reg test.bc -f -o test.opt.bc). This will take non-address taken alloca's, convert them into virtual registers, and introduce phi-nodes where needed.

-- John T.

There are no phi functions because the program (for me with clang) is
optimized to:

define i32 @main(i32 %argc, i8** nocapture %argv) nounwind readnone {
  ret i32 1
}

Basically, the loop is unrolled, the array is unpacked into scalars,
and things are DCE/folded away.

Reid

Oh I see. Thanks!