Is this bug in LLVM?

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Hello. My name is Seung Jae Lee.

Hi Seung

I'd like to ask you onething about converting to ARM assembly code.
I saved the simplest C code shown in your LLVM webpage as 'hello.c'
And I made 'hello.bc' by "$ llvm-gcc hello.c -o hello".
In order to make ARM assembly code, I typed "llc -march=arm hello.bc -o hello.arm"
But, I met this error.

llc: ARMISelDAGToDAG.cpp:73: llvm::SDOperand LowerCALL(llvm::SDOperand, llvm::SelectionDAG&): Assertion `isVarArg == false && "VarArg not supported"' failed.
llc((anonymous namespace)::PrintStackTrace()+0x15)[0x850437d]
llc((anonymous namespace)::SignalHandler(int)+0x139)[0x8504645]
Aborted

I can't understand. Would you mind replying to me w.r.t this?

Which version of LLVM are you using? I tried this with the current CVS version and it worked just fine. It could be that the version you have didn't have variadic support in it for ARM.

-bw