llvm 'select' instruction

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1

hello guys:
i am thinking about what kind of C instructions can turn into llvm IR
'select' instruction.
i tried "d=a?b:c" and compiled it using clang, i still didn't get 'select'
is there anybody who knows this?
thank you

2

Something like this should do the job (taken from a test file from the libbeauty decompiler project):

/* A very simple jump table. */
int test58(int var1) {
int n = 0;
switch (var1) {
case 1:
n = 1;
break;
case 2:
n = 2;
break;
case 3:
n = 3;
break;
case 4:
n = 4;
break;
case 5:
n = 5;
break;
}
return n;

3

Hi Dong,

try turning optimizations on. I get the select then:

└─[$]› echo 'int min(int a, int b) { return a < b ? a : b; }' | clang -xc -O1 -S -emit-llvm -o - -
; ModuleID = '-'
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

define i32 @min(i32 %a, i32 %b) nounwind uwtable readnone {
entry:
  %cmp = icmp slt i32 %a, %b
  %cond = select i1 %cmp, i32 %a, i32 %b
  ret i32 %cond
}

Cheers,
Clemens

4

Did you try to compile this with optimization enabled? (at least -O1)

For me, this gets compiled to a select instruction:

int a;

int main() {
return a > 0 ? 123: 321;
}

Results in:

@a = common global i32 0, align 4

define i32 @main() nounwind uwtable readonly {
entry:
  %0 = load i32* @a, align 4, !tbaa !0
  %cmp = icmp sgt i32 %0, 0
  %cond = select i1 %cmp, i32 123, i32 321
  ret i32 %cond
}

!0 = metadata !{metadata !"int", metadata !1}
!1 = metadata !{metadata !"omnipotent char", metadata !2}
!2 = metadata !{metadata !"Simple C/C++ TBAA"}

Greetings,
Jan

5

Hi,

If you run the simplify-cfg pass, select instructions should get generated.

Regards,
Sam

6

hi, james:
thank you for your reply.
it seems i should use the right optimization option.
the code you provided may generate 'select' instruction

7

hi Clemens Hammacher:
thank you for your helpful answer.
but i have another question about this 'select' instruction.
i think that in LLVM IR, i can use a branch and two seperate assignments to
replace 'select' instruction(am i right?).
so is there any compiling option to aviod generate 'select' instruction?

8

hi Jan:
thank you for your help.
but i have another question about this 'select' instruction.
i think that in LLVM IR, i can use a branch and two seperate assignments to
replace 'select' instruction(am i right?).
so is there any compiling option to aviod generate 'select' instruction?

9

hi Sam:
thank you for your reply.
but i have another question about this 'select' instruction.
i think that in LLVM IR, i can use a branch and two seperate assignments to
replace 'select' instruction(am i right?).
so is there any compiling option to aviod generate 'select' instruction?

10

From: llvmdev-bounces@cs.uiuc.edu [mailto:llvmdev-bounces@cs.uiuc.edu]
On Behalf Of Dong Chen
Subject: Re: [LLVMdev] llvm 'select' instruction

but i have another question about this 'select' instruction.

There's no reason to post the same query to the list multiple times; more than once is annoying.

i think that in LLVM IR, i can use a branch and two seperate assignments to
replace 'select' instruction(am i right?).
so is there any compiling option to aviod generate 'select' instruction?

Not in the standard LLVM. We have implemented local code that avoids the generation of selects, since on some CPUs branch prediction is superior to cmov.

- Chuck

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11

I am not sure what situation is. Your c code in llvm travel as:

clang | IR build | combine … | isel | … |
c code → IR → DAG → DAG → DAG(machine relative) ----> machine code
&nb! sp; I II III
situation I: you need to aviod ‘select’ in IR?
→ Maybe you need to chang the ‘clang’;
situation II: you need to aviod ‘select’ DAG node?
→ you can focuse on IR build;
situation III: you need to aviod ‘select’ machine instruction (your ISA relative)?
→ you can add pattern for ‘select’ node, to map for your own instruction.