LLVM Weekly - #506, September 11th 2023
If you prefer, you can read a HTML version of this email at http://llvmweekly.org/issue/506.
Welcome to the five hundred and sixth issue of LLVM Weekly, a weekly newsletter (published every Monday) covering developments in LLVM, Clang, and related projects. LLVM Weekly is brought to you by Alex Bradbury. Subscribe to future issues at http://llvmweekly.org and pass it on to anyone else you think may be interested. Please send any tips or feedback to asb@asbradbury.org, @llvmweekly or @asbradbury on Twitter, or @llvmweekly@fosstodon.org or @asb@fosstodon.org.
News and articles from around the web and events
Poster submissions are invited for the 2023 LLVM Developers’ Meeting. Additionally, early brid registration will close on 15th September.
According to the LLVM calendar in the coming week there will be:
- Office hours with the following hosts: Aaron Ballman, Alexey Bader, Alina Sbirlea, Kristof Beyls, the BOLT maintainers, Johannes Doerfert.
- Online sync-ups on the following topics: OpenMP, Flang, RISC-V, MLIR, LLVM embedded toolchains.
- For more details see the LLVM calendar, getting involved documentation on online sync ups and office hours.
On the forums
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LLVM 17.0.0-rc4 was released. This is intended as the last release candidate.
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Tom Stellard outlined some proposed changes to the pull request subscription system, noting challenges with the current CODEOWNERS file approach.
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Fangrui Song started a discussion about reviews.llvm.org entering read-only mode.
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Anton Kochkov provided an update on the proposal to add an abstraction layer between codegen and syntax printing in TableGen.
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Markus Böck shared an MLIR RFC on supporting aliases in cyclic types and attributes.
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Prabhuk proposed introducing UEFI targets to Clang/LLVM.
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Alex Bradbury queried if the libc policy on assembly should extend to functions like setjmp and longjmp.
LLVM commits
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The documentation on GitHub was extended with an example of making a PR through GitHub’s web interface. 93cc72b.
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‘Builtin instructions’ were added for GISel MIR patterns. These offer additional capabilities that cannot currently be expressed without falling back to C++ code. 844c0da.
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The GlobalISel Combiner API was refactored. aaf6755.
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OperandMatchResultTyhas now been fully replaced withParseStatus1in AsmParser APIs. a479be0. -
Branch relaxation learned to optimise for code size of ‘hot’ code on AArch64. 866ae69.
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A new pass was added for PowerPC to merge all constant global arrays into one pool. 84e2fd7.
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Changes to lit’s test output were reverted. bb6d5fc, 9f111d9.
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A SchedModel was defined for Power8. b922a36.
Clang commits
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Clang-side support for machine function splitting on AArch64 was enabled. 776e3b0.
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-m[no-]evex512was introduced for X86 to disable ZMM and 64-bit mask instructions for AV512 features, allowing you to build binaries that can run on both legacy AVX512 targets and AVX10-256. 2419409.