LLVM Weekly - #539, April 29th 2024

LLVM Weekly - #539, April 29th 2024

If you prefer, you can read the canonical version version of this issue at http://llvmweekly.org/issue/539.

Welcome to the five hundred and thirty-ninth issue of LLVM Weekly, a weekly newsletter (published every Monday) covering developments in LLVM, Clang, and related projects. LLVM Weekly is brought to you by Alex Bradbury. Subscribe to future issues at http://llvmweekly.org and pass it on to anyone else you think may be interested. Please send any tips or feedback to asb@asbradbury.org, @llvmweekly or @asbradbury on Twitter, or @llvmweekly@fosstodon.org or @asb@fosstodon.org.

News and articles from around the web and events

Fangrui Song blogged about the removal of -mrelax-all from -O0.

The next Zurich Compiler Social will take place on May 14th and feature the talk “Computing Bounds of SSA Values in MLIR” by Matthias Springer.

The next Cambridge UK LLVM social will take place on 16th May.

The BAŞARIM 2024 conference (to be held in Ankara, Turkey) has a call for LLVM talks.

According to the LLVM calendar in the coming week there will be the following:

  • Office hours with the following hosts: Quentin Colombet, Johannes Doerfert.
  • Online sync-ups on the following topics: Flang, MLIR C/C++ frontend, pointer authentication, new contributors, llvm/offload, classic flang, Clang C/C++ language working group, loop optimisations, OpenMP for flang, MLIR, HLSL, MLGO.
  • For more details see the LLVM calendar, getting involved documentation on online sync ups and office hours.

On the forums

LLVM commits

  • The initial calling convention lowering was implemented for the Xtensa backend. 36209d3.

  • Memory model relaxation annotations are now supported in LLVM IR. See the included documentation for many more details. cf328ff.

  • Targets can now provide target-specified module splitting logic for --lto-partitions. e86ebe4.

  • RISC-V extension information is now specified RISCVFeatures.td and the relevant C++ logic is primarily produced by TableGen. a6c0282, b64e483, 80628ee.

  • Multivalue return is enabled in WebAssembly when the multivalue ABI is used. c921ac7.

  • By specialising more MatchTable opcodes, the size of AArch64InstructionSelector.cpp.o was reduced by 10% and the MatchTable size by 17%. 9375962.

  • llvm-objdump now prints disassembled RISC-V instructions in the same byte order as GNU objdump. b27f86b.

  • A HexagonCopyHoisting pass was added. cb508a0.

Clang commits

  • The AArch64 Neoverse-{N3,V3,V3AE} are now supported. a670cda.

  • The bugprone-return-const-ref-from-parameter, modernize-min-max-use-initializer-list, and readability-math-missing-parantheses checks were added to clang-tidy. d56f08b, d3f92e3, 8dc7db7.

  • __GCC_DESTRUCTIVE_SIZE and __GCC_CONSTRUCTIVE_SIZE are now defined. 72c373b.

  • -mrelax-all is no longer enabled for O0 on RISC-V. 6b1b4c1.

  • Bfloat16 intrinsics for the RISC-V Zvfbf* vector extensions are now supported. 3fa6b9c.

Other project commits

  • ctx_profile was added to compiler-rt, adding the basic scaffolding for contextual instrumented PGO. 6ad22c8.

  • LLVM’s libc documented their policy on use of assembly code. 0336116.

  • Libcxx documentation on modules was updated to describe the use of CMake 3.30’s module support. 033453a.

  • An initial patch towards “step into specific / step in targets” support in LLDB DAP was landed. 2f2e31c3.

  • MLIR documentation was added on how to use sharded op definitions. 83d0616.