LLVM Weekly - #554, August 12th 2024

LLVM Weekly - #554, August 12th 2024

If you prefer, you can read the canonical version of this issue at http://llvmweekly.org/issue/554.

Welcome to the five hundred and fifty-fourth issue of LLVM Weekly, a weekly newsletter (published every Monday) covering developments in LLVM, Clang, and related projects. LLVM Weekly is brought to you by Alex Bradbury. Subscribe to future issues at http://llvmweekly.org and pass it on to anyone else you think may be interested. Please send any tips or feedback to asb@asbradbury.org, @llvmweekly or @asbradbury on Twitter, or @llvmweekly@fosstodon.org or @asb@fosstodon.org.

News and articles from around the web and events

Registration is now open for the 2024 LLVM Developers’ Meeting, and the full/half day workshops ahve been announced. More details have been posted about the LLVM :hearts: ML Workshop, and the talk submission deadline for the mean Dev Meeting has been extended by a single day (today).

Min-Yih Hsu blogged about scheduling models in LLVM.

Ramkumar Ramachandra blogged about auto-vectorization in LLVM and introducing LLVM backends.

The next Toronto LLVM meetup will take place on August 15th and feature talks on “Catalyst: An AOT/JIT compiler for accelerated quantum computing in Python” and “DPC++ SYCL Compiler”.

The monthly LLVM Bay Area meetup is taking place today (12th August).

According to the LLVM calendar in the coming week there will be the following:

  • Office hours with the following hosts: Aaron Ballman, Alexey Bader, Kristof Beyls, Johannes Doerfert.
  • Online sync-ups on the following topics: pointer authentication, new contributors, OpenMP, Flang, BOLT, RISC-V, MLIR, embedded toolchains.
  • For more details see the LLVM calendar, getting involved documentation on online sync ups and office hours.

On the forums

LLVM commits

  • Basic block numbers are now used to store dominator tree nodes in a vector. c2f92fa, d871b2e.

  • If --skip-line-zero is passed, LLVM symbolizer can now report the nearest non-zero line number if it can’t get the correct line number. 0886440.

  • The ExpandVP pass was merged into PreISelIntrinsicLowering. fa92d51.

  • The NVPTX backend gained support for Volta’s sequentially consistent load and store operations. f55abd5.

  • A LoongArchMergeBaseOffset pass was added. b2e69f5.

  • riscv-experimental-rv64-legal-i32 was backed out for now as it’s not receiving active development attention. ca7ad38.

  • A merge-release-pr.py script was added to help release managers merge backports PRs. f3e950a.

  • IRBuilder now generates nuw GEPs for struct member accesses. 94473f4.

Clang commits

  • Builtins were added for the AVX10.2-SATCVT instructions. 80721e0.

  • Single-element accesses to GCC vector/ext_vector_type objects can now be used in constant expressions. 7753429.

  • attribute((rvv_vector_bits(N))) can now be used when N < 8. 635d20e.

Other project commits

  • LLVM’s libopenmp can now compile and run under the emscripten WebAssembly toolchain. f7b2c2e.

  • Spin lock family functions were added to LLVM’s libc. 03841e7.

  • “Edit this page” links were added to LLDB’s generated documentation. 2771ce8.

  • MLIR’s documentation for scalable vectors was updated. 673604a.

  • mlir-opt now has a --list-passes option. 5e6d5c0.

2 Likes

Why did I find this now?
thanks @asb

1 Like