LLVM Weekly - #650, June 15th 2026

[asb]

LLVM Weekly - #650, June 15th 2026

If you prefer, you can read the canonical version of this issue at https://llvmweekly.org/issue/650.

Welcome to the six hundred and fiftieth issue of LLVM Weekly, a weekly newsletter (published every Monday) covering developments in LLVM, Clang, and related projects. LLVM Weekly is brought to you by Alex Bradbury. Subscribe to future issues at https://llvmweekly.org and pass it on to anyone else you think may be interested. Please send any tips or feedback via email: asb@asbradbury.org, or Mastodon: @llvmweekly@fosstodon.org / @asb@fosstodon.org, or Bluesky: @llvmweekly.org / @asbradbury.org.

News and articles from around the web and events

The next Portland LLVM social will take place on June 30th.

Herb Sutter shared a trip report from the June ISO C++ standards meeting in Brno.

According to the LLVM Calendar in the coming week there will be the following:

• Office hours with the following hosts: Phoebe Wang, Johannes Doerfert, Aaron Ballman.
• Online sync-ups on the following topics: Formal specification, pointer authentication, vectorizer improvements, clang static analysis, OpenMP, Clang C and C++ language working group, Flang, SPIR-V, RISC-V, embedded toolchains, HLSL, LLVM libc math.
• For more details see the LLVM calendar, getting involved documentation on online sync ups and office hours.

On the forums

• The LLVM Foundation is inviting applications for new board members.

• Aiden Grossman, Yunbo Ni, and Yingwei Zheng started an RFC discussion on providing infrastructure for AI review of PRs.

• Farid Zakaria is setting up a working group on solving the challenges of linking massive binaries in LLD. “The group would provide a platform for discussing cross-cutting concerns around relocation overflows, and modifications to the x86-64 ABI via code-models such as range-extension thunks.”

• Gaëtan Bossu posted an RFC on updating support for re-vectorisation in the LoopVectorizer. “The short version is that many loops in real code already operate on fixed-length vectors, often because they were written using target intrinsics. Today the LoopVectorizer ignores such loops as already-vectorised and does not try to widen them further. For Arm, this misses an important migration path: there is a lot of existing code written for NEON, and being able to turn fixed-length NEON-style vector loops into scalable-length SVE loops is an investment in future-proofing that code without requiring source rewrites.”

• Four months comes around quickly - it’s time for another update on Flang development. As usual, this is a great high level summary of where things are at and what has changed in the past four months.

• Galina Kistonova shared plans to migrate to buildbot v4.3.

• Alex Zinenko is seeking agreement within the MLIR contributor community on what to do with third-party project ‘promotion’ posts.

• Jacek Caban proposes a solution for supporting multi-architecture object files that contain both Arm64EC and AArch64 object files. This RFC is an alternate to / evolution from previous proposals.

• Kamlesh Kumar would like to update LoopVectorize to emit deinterleaving intrinsics for fixed-length vectors rather than explicit shuffle masks.

• Luke Hutton started an MLIR RFC thread on expressing block-scaled operations in TOSA.

LLVM commits

• Scheduling models and definitions were added for the Hygon X86 processors. 00e3e6f.

• Windows x64 unwind information v3 is now supported. df75b5d.

• In LLVM IR, bundle attributes were introduced and are used in most places where assue bundles are handled. 377e0fb.

• The utils/release/build-docs.sh script can now be used to generate man pages. de42f4f.

• The SpacemiT X60 scheduling model is now used for -mtune=generic for RISC-V. 5e8d406.

• As part of the work on Lightweight Fault Isolation for AArch64, rewrites for memory accesses were added. e07b47e.

Clang commits

• The readability-redundant-nested-if check was added which looks for nested ifs that could be merged with &&. fc1f754.

• The default LTO mode for AMDGCN/SPIR-V targets is now “full”. 859ee9d.

• riscv_packed_simd.h was added containing RISC-V P extension intrinsics. b000f90.

• TableGen now spits out a list of undocumented attributes in Clang. This will be used to help enforce the requirement that all new attributes are documented. 96eb0cb.

Other project commits

• The LLD ELF linker now supports control flow integrity (CFI) jump table relaxation, where it will eliminate indirection by moving small function bodies into the jump table. “A complete implementation of jump table relaxation was found to reduce the overhead of CFI in a large realistic internal Google benchmark by between 0.2 and 0.5 percentage points, or 10-25%, depending on the microarchitecture.” 7212c8f.

• LLVM’s libc gained an LIBC_MATH_ASSUME_ROUND_NEAREST_ONLY build option. 582643f.

• LLDB learned to handle RISC-V feature attributes from ELF. 127a4c1.